A typical image sensor incorporates a number of photodiodes aligned in the fast scan direction and a number of electrodes for extracting electric charge from the photodiodes, which in consequence involves a complicated wiring configuration. Japanese Patent Laid Open No. Sho 59-147148 (1984), for example, discloses an image sensor having a comparatively simple wiring configuration with fewer electrodes than photodiodes. FIG. 7 shows an one-dimensional image sensor having a number of photoreceptor elements aligned in the fast scan direction, including a plurality of photodiodes 71 divided into n groups Gi (i=1 to n), each group consisting of m photodiodes 71 having their cathodes jointly connected to a corresponding transistor 73. There are thus n transistors 73, which are connected to an common output terminal T and to a reverse bias circuit including a reverse bias power supply 75 and a load resistance 76 connected in series. The gate electrodes of the n transistors 73 are connected to a group-selector shift register 77. The image sensor also includes a plurality of blocking diodes 72 of conventional configuration, connected one to each of the photodiodes 71 in series-opposition; that is, each blocking diode 72 has its anode connected to the anode of the corresponding photodiode 71. The cathodes of the blocking diodes 72 are connected with one another in such a manner that the leftmost blocking diode in a given block is connected with the leftmost blocking diodes in all the other blocks, the second leftmost blocking diode in a given block is connected together with the other second leftmost blocking diodes, and so on, thereby forming m sets of connections. M transistors 74 are also provided in the image sensor, which have first ends connected to corresponding sets of connections, second ends connected to the above-mentioned reverse bias circuit, and their gate electrodes connected to a group-selector shift register 78.
This configuration requires fewer wiring conductors, since the shift register 77 sequentially transmits selecting pulses to the gate electrodes of the n transistors 73, to energize the corresponding groups Gi (i=1 to n) in turn, while the shift register 78 sequentially transmits selecting pulses to the gate electrodes of the m transistors 74, to render the related diodes conductive. M+n transistors the therefore required to extract image information from all the photodiodes in the image sensor, resulting in wiring conductors reduced.
In the operation of the image sensor, the shift register 77 transmits a pulse to the gate electrode of the leftmost transistor 73 for example, at the same time the shift register 78 transmits a pulse to the gate electrode of the leftmost transistor 74. This makes the leftmost photodiode 71A and its series-connected blocking diode 72A in the G1 group electrically connected to the reverse bias circuit, to cause the leftmost photodiode 71A in the G1 group to send its output to the output terminal T. The shift register 78 then transmits another pulse to the gate electrode of the second leftmost transistor 74, to cause the second leftmost photodiode 71B in the G1 group to send its output to the output terminal T. In this manner, while group G1 is energized by the shift register 77, the shift register 78 activates the m transistors 74 in turns, to obtain the all image information produced in group G1.
Without blocking diodes 72, circulating currents as indicated by a dashed line in FIG. 7 would occur, in which a circulating current starts at the photodiode 71B and flows into the wiring conductor connected to the photodiode 71A. Even if the photodiode 71A reads a black portion of the original, the output value of the photodiode 71A cannot be zero because the photodiode 71A receives circulating currents from other photodiodes such as the photodiode 71B. For this reason, the blocking diodes 72 are provided, connected one to each of the photodiodes 71 in series-opposition so as to prevent circulating currents.
Japanese Patent Laid Open No. Hei. 3-209767 (1991) discloses a two-dimensional image sensor having a plurality of photodiodes in pairs and a single shift register. A pulse from the single shift register causes each photodiode in turn to be charged and to provide an output simultaneously. This type of image sensor will now be described referring to FIGS. 8, 9, and 10. FIG. 8 is a cross-sectional view of a pair of photodiodes of the image sensor, taken along line B--B in FIG. 9. FIG. 9 is a plan view of the image sensor illustrating pairs of photodiodes arranged in three lines. FIG. 10 is a circuit diagram of the image sensor.
The image sensor as shown in FIG. 8 has a photodiode PD3 and a blocking photodiode PD4, which have a common lower electrode 82 of chromium (Cr) formed on an electrode 81, photoelectric conversion layers 83A and 83B of hydrogenated amorphous silicon (a-Si:H) placed apart side by side on the lower electrode 82, and transparent upper electrodes 84A and 84B on the photoelectric conversion elements 83A and 83B respectively. The image sensor further includes an insulating layer 85 for covering the upper electrodes 84A and 84B and the remaining portions of the transparent substrate 81 not underlying the upper electrodes 84A and 84B. Formed on the insulating layer 85 are signal lines 87 and 88, which electrically contact to the upper electrodes 84A and 84B through openings 86A and 86B respectively, the openings formed in the insulating layer 85. The numeral, 90, in the figure denotes light from an image-bearing original.
The photodiodes PD3 and PD4 are connected to each other in series-opposition, to form a pair corresponding to one picture element. The pairs of photodiodes are arranged two-dimensionally in three rows on the transparent electrode 81 as shown in FIG. 9. Each of the signal lines 87 assigned to a row of photodiodes PD3 is connected to a detecting circuit including a load resistance R and an output terminal T as shown in FIG. 10. The signal lines 88 connect each of the photodiodes PD4 to its corresponding signal line 89, and the signal lines 89 connect to a shift register 80.
The image sensor operates as follows. Referring to FIG. 10, the shift register 80 sequentially transmits activating pulse voltages P to the pairs of photodiodes PD3 and PD4, to cause the photodiodes PD4 to be forward-biased and the photodiodes PD3 to be reverse-biased. The reverse-biased photodiode PD3 has its capacitance CP3 charged in the polarity shown in the figure. After the end of each transmission, the electric charge in the capacitance CP3 is distributed to the capacitance CP4 of the photodiode PD4 and stored therein in the polarity shown in the figure. Then the photodiodes PD3 and PD4 receive light from the original, and photogenerated currents flow according to the quantity of the light received. The photogenerated currents cause the capacitance CP3 and CP4 to discharge. The shift register 80 then transmits secondary pulse voltages to the pairs of photodiodes PD3 and PD4 in turn in the same manner as above, to cause the previously discharged capacitances CP3 to be charged again. Each charging generates an electric current flow into the load resistor R, the current being detected by the output terminal T.
The thus-configured image sensor has good photoelectric conversion characteristics, but poor responsiveness to the forward current, since the incorporated photodiodes are of Schottky type with a single layer of hydrogenated amorphous silicon formed on an electrode of chromium (Cr). Lower responsiveness to the forward current makes it difficult to saturate the capacitance of the reverse-biased photodiode. Saturation can be accomplished by lengthening the pulse application time period, but this reduces the image sensor driving speed. The difficulty of saturating the capacitance causes residual images, because the capacitances cannot be supplied with electric charge of the same quantity as was lost by discharging.